Blob Blame History Raw
From: Yongqiang Sun <yongqiang.sun@amd.com>
Date: Fri, 27 Jan 2017 10:29:01 -0500
Subject: drm/amd/display: Change power gating off sequence to fix hang
Git-commit: bb9042da8e8ada796cfae7e432a54e872c5b1784
Patch-mainline: v4.15-rc1
References: FATE#326289 FATE#326079 FATE#326049 FATE#322398 FATE#326166

Power off plane clear all the reg values includes cursor.
When OS call set cursor position, cursor address reg is cleared,
results in system hard hang.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Petr Tesarik <ptesarik@suse.com>
---
 drivers/gpu/drm/amd/display/dc/core/dc.c |    7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -1254,9 +1254,12 @@ bool dc_post_update_surfaces_to_stream(s
 	post_surface_trace(dc);
 
 	for (i = 0; i < core_dc->current_context->res_ctx.pool->pipe_count; i++)
-		if (core_dc->current_context->res_ctx.pipe_ctx[i].stream == NULL)
+		if (core_dc->current_context->res_ctx.pipe_ctx[i].stream == NULL) {
+			core_dc->current_context->res_ctx.pipe_ctx[i].pipe_idx = i;
 			core_dc->hwss.power_down_front_end(
-				core_dc, &core_dc->current_context->res_ctx.pipe_ctx[i]);
+							core_dc, &core_dc->current_context->res_ctx.pipe_ctx[i]);
+		}
+
 
 	if (core_dc->res_pool->funcs->validate_bandwidth(core_dc, core_dc->current_context)
 			!= DC_OK) {