From: Charlene Liu <charlene.liu@amd.com>
Date: Fri, 17 Feb 2017 13:59:11 -0500
Subject: drm/amd/display: fix incorrect programming for YCbCr422 and YCbCr420
Git-commit: 181a888fcd723c4bc63f43aac50713c34ae9102e
Patch-mainline: v4.15-rc1
References: FATE#326289 FATE#326079 FATE#326049 FATE#322398 FATE#326166

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Petr Tesarik <ptesarik@suse.com>
---
 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c     |   12 ++++++--
 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c |   17 ++++++------
 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c     |    3 ++
 3 files changed, 21 insertions(+), 11 deletions(-)

--- a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
@@ -362,9 +362,15 @@ static void dce110_stream_encoder_hdmi_s
 		REG_UPDATE(HDMI_CONTROL, HDMI_DEEP_COLOR_DEPTH, 0);
 		break;
 	case COLOR_DEPTH_101010:
-		REG_UPDATE_2(HDMI_CONTROL,
-			HDMI_DEEP_COLOR_DEPTH, 1,
-			HDMI_DEEP_COLOR_ENABLE, 1);
+		if (crtc_timing->pixel_encoding == PIXEL_ENCODING_YCBCR422) {
+			REG_UPDATE_2(HDMI_CONTROL,
+					HDMI_DEEP_COLOR_DEPTH, 1,
+					HDMI_DEEP_COLOR_ENABLE, 0);
+		} else {
+			REG_UPDATE_2(HDMI_CONTROL,
+					HDMI_DEEP_COLOR_DEPTH, 1,
+					HDMI_DEEP_COLOR_ENABLE, 1);
+			}
 		break;
 	case COLOR_DEPTH_121212:
 		if (crtc_timing->pixel_encoding == PIXEL_ENCODING_YCBCR422) {
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -861,10 +861,6 @@ static void build_audio_output(
 	audio_output->crtc_info.requested_pixel_clock =
 			pipe_ctx->pix_clk_params.requested_pix_clk;
 
-	/*
-	 * TODO - Investigate why calculated pixel clk has to be
-	 * requested pixel clk
-	 */
 	audio_output->crtc_info.calculated_pixel_clock =
 			pipe_ctx->pix_clk_params.requested_pix_clk;
 
@@ -1044,15 +1040,14 @@ static enum dc_status apply_single_contr
 			stream->public.timing.display_color_depth,
 			pipe_ctx->stream->signal);
 
+	/* FPGA does not program backend */
+	if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
 	pipe_ctx->opp->funcs->opp_program_fmt(
 			pipe_ctx->opp,
 			&stream->bit_depth_params,
 			&stream->clamping);
-
-	/* FPGA does not program backend */
-	if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment))
 		return DC_OK;
-
+	}
 	/* TODO: move to stream encoder */
 	if (pipe_ctx->stream->signal != SIGNAL_TYPE_VIRTUAL)
 		if (DC_OK != bios_parser_crtc_source_select(pipe_ctx)) {
@@ -1065,6 +1060,12 @@ static enum dc_status apply_single_contr
 			stream->sink->link->link_enc,
 			pipe_ctx->stream->signal);
 
+/*vbios crtc_source_selection and encoder_setup will override fmt_C*/
+	pipe_ctx->opp->funcs->opp_program_fmt(
+			pipe_ctx->opp,
+			&stream->bit_depth_params,
+			&stream->clamping);
+
 	if (dc_is_dp_signal(pipe_ctx->stream->signal))
 		pipe_ctx->stream_enc->funcs->dp_set_stream_attribute(
 			pipe_ctx->stream_enc,
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c
@@ -777,6 +777,9 @@ static void get_pixel_clock_parameters(
 	pixel_clk_params->flags.SUPPORT_YCBCR420 = (stream->public.timing.pixel_encoding ==
 			PIXEL_ENCODING_YCBCR420);
 	pixel_clk_params->pixel_encoding = stream->public.timing.pixel_encoding;
+	if (stream->public.timing.pixel_encoding == PIXEL_ENCODING_YCBCR422) {
+		pixel_clk_params->color_depth = COLOR_DEPTH_888;
+	}
 }
 
 void dce110_resource_build_bit_depth_reduction_params(