From: Roman Li <Roman.Li@amd.com>
Date: Fri, 25 Aug 2017 16:44:20 -0400
Subject: drm/amd/display: program fbc for scatter/gather
Git-commit: 07fde11f27fb4de3b63ef117593291b094a23e15
Patch-mainline: v4.15-rc1
References: FATE#326289 FATE#326079 FATE#326049 FATE#322398 FATE#326166

Fixing screen flickering when FBC enabled on Stoney

Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Petr Tesarik <ptesarik@suse.com>
---
 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c |   18 ++++++++++++--
 1 file changed, 16 insertions(+), 2 deletions(-)

--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c
@@ -189,7 +189,7 @@ void dce110_compressor_enable_fbc(
 		(!dce110_compressor_is_fbc_enabled_in_hw(compressor, NULL))) {
 
 		uint32_t addr;
-		uint32_t value;
+		uint32_t value, misc_value;
 
 
 		addr = mmFBC_CNTL;
@@ -206,9 +206,23 @@ void dce110_compressor_enable_fbc(
 		compressor->attached_inst = params->inst;
 		cp110->offsets = reg_offsets[params->inst];
 
-		/*Toggle it as there is bug in HW */
+		/* Toggle it as there is bug in HW */
 		set_reg_field_value(value, 0, FBC_CNTL, FBC_GRPH_COMP_EN);
 		dm_write_reg(compressor->ctx, addr, value);
+
+		/* FBC usage with scatter & gather for dce110 */
+		misc_value = dm_read_reg(compressor->ctx, mmFBC_MISC);
+
+		set_reg_field_value(misc_value, 1,
+				FBC_MISC, FBC_INVALIDATE_ON_ERROR);
+		set_reg_field_value(misc_value, 1,
+				FBC_MISC, FBC_DECOMPRESS_ERROR_CLEAR);
+		set_reg_field_value(misc_value, 0x14,
+				FBC_MISC, FBC_SLOW_REQ_INTERVAL);
+
+		dm_write_reg(compressor->ctx, mmFBC_MISC, misc_value);
+
+		/* Enable FBC */
 		set_reg_field_value(value, 1, FBC_CNTL, FBC_GRPH_COMP_EN);
 		dm_write_reg(compressor->ctx, addr, value);