From: Shirish S <shirish.s@amd.com>
Date: Tue, 26 Sep 2017 15:35:42 +0530
Subject: drm/amd/display: make FBC configurable option
Git-commit: 3eab79163fcb0f7777440dfe360d2eedbbcc47b9
Patch-mainline: v4.15-rc1
References: FATE#326289 FATE#326079 FATE#326049 FATE#322398 FATE#326166

Currently FBC is guarded with ENABLE_FBC macro,
which needs to be manually enabled in Makefile.

This patch moves it to Kconfig so that there
wont be any need to additional patch to be carried
for enabling or disabling on every SoC.

Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Petr Tesarik <ptesarik@suse.com>
---
 drivers/gpu/drm/amd/display/Kconfig                         |   10 +++++++
 drivers/gpu/drm/amd/display/dc/core/dc.c                    |    2 -
 drivers/gpu/drm/amd/display/dc/dc.h                         |    4 +--
 drivers/gpu/drm/amd/display/dc/dc_types.h                   |    2 -
 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c   |    2 -
 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c |   16 ++++++------
 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c     |    4 +--
 7 files changed, 25 insertions(+), 15 deletions(-)

--- a/drivers/gpu/drm/amd/display/Kconfig
+++ b/drivers/gpu/drm/amd/display/Kconfig
@@ -17,6 +17,16 @@ config DRM_AMD_DC_PRE_VEGA
 	  by default. This includes Polaris, Carrizo, Tonga, Bonaire,
 	  and Hawaii.
 
+config DRM_AMD_DC_FBC
+	bool "AMD FBC - Enable Frame Buffer Compression"
+	depends on DRM_AMD_DC
+	help
+	  Choose this option if you want to use frame buffer compression
+	  support.
+	  This is a power optimisation feature, check its availability
+	  on your hardware before enabling this option.
+
+
 config DRM_AMD_DC_DCN1_0
 	bool "DCN 1.0 Raven family"
 	depends on DRM_AMD_DC && X86
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -507,7 +507,7 @@ static bool construct(struct dc *dc,
 
 	dc_version = resource_parse_asic_id(init_params->asic_id);
 	dc->ctx->dce_version = dc_version;
-#ifdef ENABLE_FBC
+#if defined(CONFIG_DRM_AMD_DC_FBC)
 	dc->ctx->fbc_gpu_addr = init_params->fbc_gpu_addr;
 #endif
 	/* Resource should construct all asic specific resources.
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -258,7 +258,7 @@ struct dc {
 	struct dm_pp_display_configuration prev_display_config;
 
 	/* FBC compressor */
-#ifdef ENABLE_FBC
+#if defined(CONFIG_DRM_AMD_DC_FBC)
 	struct compressor *fbc_compressor;
 #endif
 };
@@ -293,7 +293,7 @@ struct dc_init_data {
 
 	struct dc_config flags;
 	uint32_t log_mask;
-#ifdef ENABLE_FBC
+#if defined(CONFIG_DRM_AMD_DC_FBC)
 	uint64_t fbc_gpu_addr;
 #endif
 };
--- a/drivers/gpu/drm/amd/display/dc/dc_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_types.h
@@ -92,7 +92,7 @@ struct dc_context {
 	bool created_bios;
 	struct gpio_service *gpio_service;
 	struct i2caux *i2caux;
-#ifdef ENABLE_FBC
+#if defined(CONFIG_DRM_AMD_DC_FBC)
 	uint64_t fbc_gpu_addr;
 #endif
 };
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c
@@ -514,7 +514,7 @@ void dce110_compressor_construct(struct
 	compressor->base.lpt_channels_num = 0;
 	compressor->base.attached_inst = 0;
 	compressor->base.is_enabled = false;
-#ifdef ENABLE_FBC
+#if defined(CONFIG_DRM_AMD_DC_FBC)
 	compressor->base.funcs = &dce110_compressor_funcs;
 
 #endif
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -34,7 +34,7 @@
 #include "dce/dce_hwseq.h"
 #include "gpio_service_interface.h"
 
-#ifdef ENABLE_FBC
+#if defined(CONFIG_DRM_AMD_DC_FBC)
 #include "dce110_compressor.h"
 #endif
 
@@ -1445,7 +1445,7 @@ static void power_down_all_hw_blocks(str
 
 	power_down_clock_sources(dc);
 
-#ifdef ENABLE_FBC
+#if defined(CONFIG_DRM_AMD_DC_FBC)
 	if (dc->fbc_compressor)
 		dc->fbc_compressor->funcs->disable_fbc(dc->fbc_compressor);
 #endif
@@ -1618,7 +1618,7 @@ static void set_static_screen_control(st
 	if (events->cursor_update)
 		value |= 0x2;
 
-#ifdef ENABLE_FBC
+#if defined(CONFIG_DRM_AMD_DC_FBC)
 	value |= 0x84;
 #endif
 
@@ -1748,7 +1748,7 @@ static void apply_min_clocks(
 	}
 }
 
-#ifdef ENABLE_FBC
+#if defined(CONFIG_DRM_AMD_DC_FBC)
 
 /*
  *  Check if FBC can be enabled
@@ -1940,7 +1940,7 @@ enum dc_status dce110_apply_ctx_to_hw(
 
 	set_safe_displaymarks(&context->res_ctx, dc->res_pool);
 
-#ifdef ENABLE_FBC
+#if defined(CONFIG_DRM_AMD_DC_FBC)
 	if (dc->fbc_compressor)
 		dc->fbc_compressor->funcs->disable_fbc(dc->fbc_compressor);
 #endif
@@ -2124,7 +2124,7 @@ enum dc_status dce110_apply_ctx_to_hw(
 
 	dcb->funcs->set_scratch_critical_state(dcb, false);
 
-#ifdef ENABLE_FBC
+#if defined(CONFIG_DRM_AMD_DC_FBC)
 	if (dc->fbc_compressor)
 		enable_fbc(dc, context);
 
@@ -2533,7 +2533,7 @@ static void init_hw(struct dc *dc)
 		abm->funcs->init_backlight(abm);
 		abm->funcs->abm_init(abm);
 	}
-#ifdef ENABLE_FBC
+#if defined(CONFIG_DRM_AMD_DC_FBC)
 	if (dc->fbc_compressor)
 		dc->fbc_compressor->funcs->power_up_fbc(dc->fbc_compressor);
 #endif
@@ -2781,7 +2781,7 @@ static void dce110_program_front_end_for
 
 	program_scaler(dc, pipe_ctx);
 
-#ifdef ENABLE_FBC
+#if defined(CONFIG_DRM_AMD_DC_FBC)
 	if (dc->fbc_compressor && old_pipe->stream) {
 		if (plane_state->tiling_info.gfx8.array_mode == DC_ARRAY_LINEAR_GENERAL)
 			dc->fbc_compressor->funcs->disable_fbc(dc->fbc_compressor);
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c
@@ -52,7 +52,7 @@
 #include "dce/dce_abm.h"
 #include "dce/dce_dmcu.h"
 
-#ifdef ENABLE_FBC
+#if defined(CONFIG_DRM_AMD_DC_FBC)
 #include "dce110/dce110_compressor.h"
 #endif
 
@@ -1279,7 +1279,7 @@ static bool construct(
 		}
 	}
 
-#ifdef ENABLE_FBC
+#if defined(CONFIG_DRM_AMD_DC_FBC)
 	dc->fbc_compressor = dce110_compressor_create(ctx);