Blob Blame History Raw
From: Rex Zhu <Rex.Zhu@amd.com>
Date: Wed, 7 Mar 2018 16:12:05 +0800
Subject: drm/amd/pp: Add new smu backend function smc_table_manager
Git-commit: 56088be9afd5ae3bcf60232388751d0e58bd01e8
Patch-mainline: v4.17-rc1
References: FATE#326289 FATE#326079 FATE#326049 FATE#322398 FATE#326166

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Petr Tesarik <ptesarik@suse.com>
---
 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h     |    1 +
 drivers/gpu/drm/amd/powerplay/inc/smumgr.h    |    2 ++
 drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c |    8 ++++++++
 3 files changed, 11 insertions(+)

--- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
@@ -237,6 +237,7 @@ struct pp_smumgr_func {
 	bool (*is_dpm_running)(struct pp_hwmgr *hwmgr);
 	bool (*is_hw_avfs_present)(struct pp_hwmgr  *hwmgr);
 	int (*update_dpm_settings)(struct pp_hwmgr *hwmgr, void *profile_setting);
+	int (*smc_table_manager)(struct pp_hwmgr *hwmgr, uint8_t *table, uint16_t table_id, bool rw); /*rw: true for read, false for write */
 };
 
 struct pp_hwmgr_func {
--- a/drivers/gpu/drm/amd/powerplay/inc/smumgr.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/smumgr.h
@@ -100,4 +100,6 @@ extern bool smum_is_hw_avfs_present(stru
 
 extern int smum_update_dpm_settings(struct pp_hwmgr *hwmgr, void *profile_setting);
 
+extern int smum_smc_table_manager(struct pp_hwmgr *hwmgr, uint8_t *table, uint16_t table_id, bool rw);
+
 #endif
--- a/drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c
@@ -199,3 +199,11 @@ int smum_update_dpm_settings(struct pp_h
 
 	return -EINVAL;
 }
+
+int smum_smc_table_manager(struct pp_hwmgr *hwmgr, uint8_t *table, uint16_t table_id, bool rw)
+{
+	if (hwmgr->smumgr_funcs->smc_table_manager)
+		return hwmgr->smumgr_funcs->smc_table_manager(hwmgr, table, table_id, rw);
+
+	return -EINVAL;
+}