From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Date: Fri, 5 Jul 2019 17:56:38 +0800
Subject: PCI: mobiveil: Initialize Primary/Secondary/Subordinate bus numbers
Git-commit: 6f3ab451aa5c2cbff33197d82fe8489cbd55ad91
Patch-mainline: v5.3-rc1
References: fate#326572
The reset value of Primary, Secondary and Subordinate bus numbers is
zero which is a broken setup.
Program a sensible default value for Primary/Secondary/Subordinate
bus numbers.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
---
drivers/pci/host/pcie-mobiveil.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/pci/host/pcie-mobiveil.c b/drivers/pci/host/pcie-mobiveil.c
index cdf15cca526e..8f561300a88e 100644
--- a/drivers/pci/host/pcie-mobiveil.c
+++ b/drivers/pci/host/pcie-mobiveil.c
@@ -561,6 +561,12 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie)
u32 value, pab_ctrl, type = 0;
struct resource_entry *win;
+ /* setup bus numbers */
+ value = csr_readl(pcie, PCI_PRIMARY_BUS);
+ value &= 0xff000000;
+ value |= 0x00ff0100;
+ csr_writel(pcie, value, PCI_PRIMARY_BUS);
+
/*
* program Bus Master Enable Bit in Command Register in PAB Config
* Space
--
2.26.2