From bf9a496a1fa434670285bd592c75d009cbb99720 Mon Sep 17 00:00:00 2001
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Date: Tue, 6 Jun 2017 13:30:40 -0700
Subject: [PATCH] drm/i915/cnl: Also need power well sanitize.
Git-commit: bf9a496a1fa434670285bd592c75d009cbb99720
Patch-mainline: v4.13-rc1
References: FATE#322643 bsc#1055900
The workaround added in
commit c6782b76d31a ("drm/i915/gen9: Reset secondary power well
equests left on by DMC/KVMR")
needs to be applied on Cannonlake as well.
So let's assume any platform using this power well setup
will also need and let's just go ahead and remove if condition.
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1496781040-20888-11-git-send-email-rodrigo.vivi@intel.com
Acked-by: Takashi Iwai <tiwai@suse.de>
---
drivers/gpu/drm/i915/intel_runtime_pm.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -853,8 +853,7 @@ static void skl_set_power_well(struct dr
DRM_DEBUG_KMS("Disabling %s\n", power_well->name);
}
- if (IS_GEN9(dev_priv))
- gen9_sanitize_power_well_requests(dev_priv, power_well);
+ gen9_sanitize_power_well_requests(dev_priv, power_well);
}
if (wait_for(!!(I915_READ(HSW_PWR_WELL_DRIVER) & state_mask) == enable,