From: Neeraj Upadhyay <quic_neeraju@quicinc.com>
Date: Tue, 25 Apr 2023 15:27:00 +0530
Subject: [PATCH] arm64: Fix label placement in record_mmu_state()
References: bsc#1012628
Patch-mainline: 6.3.3
Git-commit: 4e8f6e44bce8da3b0e2df37b12839f4bc9c9cabe
[ Upstream commit 4e8f6e44bce8da3b0e2df37b12839f4bc9c9cabe ]
Fix label so that pre_disable_mmu_workaround() is called
before clearing sctlr_el1.M.
Fixes: 2ced0f30a426 ("arm64: head: Switch endianness before populating the ID map")
Signed-off-by: Neeraj Upadhyay <quic_neeraju@quicinc.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20230425095700.22005-1-quic_neeraju@quicinc.com
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
---
arch/arm64/kernel/head.S | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index b9897090..e92caebf 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -150,8 +150,8 @@ CPU_BE( tbz x19, #SCTLR_ELx_EE_SHIFT, 1f )
pre_disable_mmu_workaround
msr sctlr_el2, x19
b 3f
- pre_disable_mmu_workaround
-2: msr sctlr_el1, x19
+2: pre_disable_mmu_workaround
+ msr sctlr_el1, x19
3: isb
mov x19, xzr
ret
--
2.35.3