From 4cebc1de506fa753301266a5a23bb21bca52ad3a Mon Sep 17 00:00:00 2001
From: Yongqiang Niu <yongqiang.niu@mediatek.com>
Date: Fri, 13 Dec 2019 15:28:51 +0800
Subject: [PATCH] drm/mediatek: Add gamma property according to hardware capability
Git-commit: 4cebc1de506fa753301266a5a23bb21bca52ad3a
Patch-mainline: v5.6-rc1
References: git-fixes
If there is no gamma function in the crtc
display path, don't add gamma property
for crtc
Fixes: 2f3f4dda747c ("drm/mediatek: Add gamma correction.")
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Signed-off-by: CK Hu <ck.hu@mediatek.com>
Acked-by: Takashi Iwai <tiwai@suse.de>
---
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
--- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
@@ -527,6 +527,7 @@ int mtk_drm_crtc_create(struct drm_devic
int pipe = priv->num_pipes;
int ret;
int i;
+ uint gamma_lut_size = 0;
if (!path)
return 0;
@@ -577,6 +578,9 @@ int mtk_drm_crtc_create(struct drm_devic
}
mtk_crtc->ddp_comp[i] = comp;
+
+ if (comp->funcs && comp->funcs->gamma_set)
+ gamma_lut_size = MTK_LUT_SIZE;
}
mtk_crtc->layer_nr = mtk_ddp_comp_layer_nr(mtk_crtc->ddp_comp[0]);
@@ -599,8 +603,10 @@ int mtk_drm_crtc_create(struct drm_devic
NULL, pipe);
if (ret < 0)
return ret;
- drm_mode_crtc_set_gamma_size(&mtk_crtc->base, MTK_LUT_SIZE);
- drm_crtc_enable_color_mgmt(&mtk_crtc->base, 0, false, MTK_LUT_SIZE);
+
+ if (gamma_lut_size)
+ drm_mode_crtc_set_gamma_size(&mtk_crtc->base, gamma_lut_size);
+ drm_crtc_enable_color_mgmt(&mtk_crtc->base, 0, false, gamma_lut_size);
priv->num_pipes++;
return 0;