From 213520c4316876d02d23011395514bbfa7c8be67 Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Mon, 13 Jun 2022 16:47:54 +0200
Subject: drm/vc4: hdmi: Add HDMI format detection registers to register list
Git-commit: d5ca98701af6cc82c9ed2406cf6eca407212e8d0
Patch-mainline: v6.0-rc1
References: jsc#PED-1166 jsc#PED-1168 jsc#PED-1170 jsc#PED-1218 jsc#PED-1220 jsc#PED-1222 jsc#PED-1223 jsc#PED-1225 jsc#PED-2849
The block can detect what the incoming image timings are for
debug purposes. Add them to the list of registers understood
by the driver to allow easy dumping of the values.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Link: https://lore.kernel.org/r/20220613144800.326124-28-maxime@cerno.tech
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Patrik Jakobsson <pjakobsson@suse.de>
---
drivers/gpu/drm/vc4/vc4_hdmi_regs.h | 30 +++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi_regs.h b/drivers/gpu/drm/vc4/vc4_hdmi_regs.h
index 0198de96c7b2..5a56761e75af 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi_regs.h
+++ b/drivers/gpu/drm/vc4/vc4_hdmi_regs.h
@@ -128,6 +128,16 @@ enum vc4_hdmi_field {
HDMI_VERTB1,
HDMI_VID_CTL,
HDMI_MISC_CONTROL,
+ HDMI_FORMAT_DET_1,
+ HDMI_FORMAT_DET_2,
+ HDMI_FORMAT_DET_3,
+ HDMI_FORMAT_DET_4,
+ HDMI_FORMAT_DET_5,
+ HDMI_FORMAT_DET_6,
+ HDMI_FORMAT_DET_7,
+ HDMI_FORMAT_DET_8,
+ HDMI_FORMAT_DET_9,
+ HDMI_FORMAT_DET_10,
};
struct vc4_hdmi_register {
@@ -241,6 +251,16 @@ static const struct vc4_hdmi_register __maybe_unused vc5_hdmi_hdmi0_fields[] = {
VC4_HDMI_REG(HDMI_MISC_CONTROL, 0x100),
VC4_HDMI_REG(HDMI_MAI_CHANNEL_MAP, 0x09c),
VC4_HDMI_REG(HDMI_MAI_CONFIG, 0x0a0),
+ VC4_HDMI_REG(HDMI_FORMAT_DET_1, 0x134),
+ VC4_HDMI_REG(HDMI_FORMAT_DET_2, 0x138),
+ VC4_HDMI_REG(HDMI_FORMAT_DET_3, 0x13c),
+ VC4_HDMI_REG(HDMI_FORMAT_DET_4, 0x140),
+ VC4_HDMI_REG(HDMI_FORMAT_DET_5, 0x144),
+ VC4_HDMI_REG(HDMI_FORMAT_DET_6, 0x148),
+ VC4_HDMI_REG(HDMI_FORMAT_DET_7, 0x14c),
+ VC4_HDMI_REG(HDMI_FORMAT_DET_8, 0x150),
+ VC4_HDMI_REG(HDMI_FORMAT_DET_9, 0x154),
+ VC4_HDMI_REG(HDMI_FORMAT_DET_10, 0x158),
VC4_HDMI_REG(HDMI_DEEP_COLOR_CONFIG_1, 0x170),
VC4_HDMI_REG(HDMI_GCP_CONFIG, 0x178),
VC4_HDMI_REG(HDMI_GCP_WORD_1, 0x17c),
@@ -324,6 +344,16 @@ static const struct vc4_hdmi_register __maybe_unused vc5_hdmi_hdmi1_fields[] = {
VC4_HDMI_REG(HDMI_MISC_CONTROL, 0x100),
VC4_HDMI_REG(HDMI_MAI_CHANNEL_MAP, 0x09c),
VC4_HDMI_REG(HDMI_MAI_CONFIG, 0x0a0),
+ VC4_HDMI_REG(HDMI_FORMAT_DET_1, 0x134),
+ VC4_HDMI_REG(HDMI_FORMAT_DET_2, 0x138),
+ VC4_HDMI_REG(HDMI_FORMAT_DET_3, 0x13c),
+ VC4_HDMI_REG(HDMI_FORMAT_DET_4, 0x140),
+ VC4_HDMI_REG(HDMI_FORMAT_DET_5, 0x144),
+ VC4_HDMI_REG(HDMI_FORMAT_DET_6, 0x148),
+ VC4_HDMI_REG(HDMI_FORMAT_DET_7, 0x14c),
+ VC4_HDMI_REG(HDMI_FORMAT_DET_8, 0x150),
+ VC4_HDMI_REG(HDMI_FORMAT_DET_9, 0x154),
+ VC4_HDMI_REG(HDMI_FORMAT_DET_10, 0x158),
VC4_HDMI_REG(HDMI_DEEP_COLOR_CONFIG_1, 0x170),
VC4_HDMI_REG(HDMI_GCP_CONFIG, 0x178),
VC4_HDMI_REG(HDMI_GCP_WORD_1, 0x17c),
--
2.38.1