From 47e8801c0d9fdf43dcb8b1f928d15e3aa5d9232d Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Jos=C3=A9=20Roberto=20de=20Souza?= <jose.souza@intel.com>
Date: Thu, 5 May 2022 12:35:20 -0700
Subject: drm/i915: Drop has_reset_engine from device info
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Git-commit: 922abe4d19bd21b38298f3902674774b92a49293
Patch-mainline: v6.0-rc1
References: jsc#PED-1166 jsc#PED-1168 jsc#PED-1170 jsc#PED-1218 jsc#PED-1220 jsc#PED-1222 jsc#PED-1223 jsc#PED-1225 jsc#PED-2849
No need to have this parameter in intel_device_info struct
as all platforms with graphics version 7 or newer can reset engines.
As a side effect of the of removal this flag, it will not be printed
in dmesg during driver load anymore and developers will have to rely
on to check the macro and compare with platform being used and IP
versions of it.
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220505193524.276400-3-jose.souza@intel.com
Acked-by: Patrik Jakobsson <pjakobsson@suse.de>
---
drivers/gpu/drm/i915/gt/intel_reset.c | 2 +-
drivers/gpu/drm/i915/i915_pci.c | 5 -----
drivers/gpu/drm/i915/intel_device_info.h | 1 -
3 files changed, 1 insertion(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index c68d36fb5bbd..e352970195ec 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -718,7 +718,7 @@ bool intel_has_reset_engine(const struct intel_gt *gt)
if (gt->i915->params.reset < 2)
return false;
- return INTEL_INFO(gt->i915)->has_reset_engine;
+ return GRAPHICS_VER(gt->i915) >= 7;
}
int intel_reset_guc(struct intel_gt *gt)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index ed8c5e9e0f4c..0942f9e348ad 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -456,7 +456,6 @@ static const struct intel_device_info snb_m_gt2_info = {
.has_coherent_ggtt = true, \
.has_llc = 1, \
.has_rc6p = 1, \
- .has_reset_engine = true, \
.has_rps = true, \
.dma_mask_size = 40, \
.ppgtt_type = INTEL_PPGTT_ALIASING, \
@@ -514,7 +513,6 @@ static const struct intel_device_info vlv_info = {
.display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B),
.display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B),
.has_runtime_pm = 1,
- .has_reset_engine = true,
.has_rps = true,
.display.has_gmch = 1,
.display.has_hotplug = 1,
@@ -618,7 +616,6 @@ static const struct intel_device_info chv_info = {
.dma_mask_size = 39,
.ppgtt_type = INTEL_PPGTT_FULL,
.ppgtt_size = 32,
- .has_reset_engine = 1,
.has_snoop = true,
.has_coherent_ggtt = false,
.display_mmio_offset = VLV_DISPLAY_BASE,
@@ -700,7 +697,6 @@ static const struct intel_device_info skl_gt4_info = {
.dma_mask_size = 39, \
.ppgtt_type = INTEL_PPGTT_FULL, \
.ppgtt_size = 48, \
- .has_reset_engine = 1, \
.has_snoop = true, \
.has_coherent_ggtt = false, \
.display.has_ipc = 1, \
@@ -1003,7 +999,6 @@ static const struct intel_device_info adl_p_info = {
.has_logical_ring_contexts = 1, \
.has_logical_ring_elsq = 1, \
.has_mslices = 1, \
- .has_reset_engine = 1, \
.has_rps = 1, \
.has_runtime_pm = 1, \
.ppgtt_size = 48, \
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index dea29b599c4b..d58837ccdeae 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -142,7 +142,6 @@ enum intel_ppgtt_type {
func(has_64k_pages); \
func(needs_compact_pt); \
func(gpu_reset_clobbers_display); \
- func(has_reset_engine); \
func(has_4tile); \
func(has_flat_ccs); \
func(has_global_mocs); \
--
2.38.1