From e5de8289cdd841cd3832beb54a9d418c248f180a Mon Sep 17 00:00:00 2001
From: David Zhang <dingchen.zhang@amd.com>
Date: Tue, 3 May 2022 10:56:54 -0400
Subject: drm/amd/display: Set PSR level to enable ALPM by default
Git-commit: c7eac19eda0a82f0c1dd9455012754445772fd09
Patch-mainline: v6.0-rc1
References: jsc#PED-1166 jsc#PED-1168 jsc#PED-1170 jsc#PED-1218 jsc#PED-1220 jsc#PED-1222 jsc#PED-1223 jsc#PED-1225 jsc#PED-2849
[Why & How]
While support ALPM, do ALPM state transition while PSR entry/exit.
ALPM is needed for PSR-SU feature, and since the function is ready,
we'd enable it by default.
- Add psr level definition to enable/disable ALPM and set ALPM
powerdone mode.
- Enable ALPM by default
Signed-off-by: David Zhang <dingchen.zhang@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Patrik Jakobsson <pjakobsson@suse.de>
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 4 ++++
drivers/gpu/drm/amd/display/dc/dc_types.h | 4 +++-
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index 68e9fc6b510c..31ffb961e18b 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -3364,6 +3364,10 @@ bool dc_link_setup_psr(struct dc_link *link,
*/
psr_context->psr_level.bits.DISABLE_PSR_ENTRY_ABORT = 1;
+ /* enable ALPM */
+ psr_context->psr_level.bits.DISABLE_ALPM = 0;
+ psr_context->psr_level.bits.ALPM_DEFAULT_PD_MODE = 1;
+
/* Controls additional delay after remote frame capture before
* continuing power down, default = 0
*/
diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h
index 144c387010c2..26b62f50ac4e 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_types.h
@@ -698,7 +698,9 @@ union dmcu_psr_level {
unsigned int SKIP_AUTO_STATE_ADVANCE:1;
unsigned int DISABLE_PSR_ENTRY_ABORT:1;
unsigned int SKIP_SINGLE_OTG_DISABLE:1;
- unsigned int RESERVED:22;
+ unsigned int DISABLE_ALPM:1;
+ unsigned int ALPM_DEFAULT_PD_MODE:1;
+ unsigned int RESERVED:20;
} bits;
unsigned int u32all;
};
--
2.38.1