From d013deab77f90aaf416bcd3c918c56768e643cbc Mon Sep 17 00:00:00 2001
From: Hansen Dsouza <Hansen.Dsouza@amd.com>
Date: Fri, 4 Feb 2022 20:24:33 -0500
Subject: drm/amd/display: Remove invalid RDPCS Programming in DAL
Git-commit: 1e242bf8bc1b37c74619403d0dd59d0f862af943
Patch-mainline: v5.18-rc1
References: jsc#PED-1166 jsc#PED-1168 jsc#PED-1170 jsc#PED-1218 jsc#PED-1220 jsc#PED-1222 jsc#PED-1223 jsc#PED-1225
RDPCS programming is done in DMUB remove legacy invalid code
Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com>
Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Hansen Dsouza <Hansen.Dsouza@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Patrik Jakobsson <pjakobsson@suse.de>
---
.../drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c | 9 ---------
1 file changed, 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c
index 8b9b1a5309ba..d94fd1010deb 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c
@@ -240,18 +240,9 @@ static void enc31_hw_init(struct link_encoder *enc)
// 100MHz -> 0x32
// 48MHz -> 0x18
-#ifdef CLEANUP_FIXME
- /*from display_init*/
- REG_WRITE(RDPCSTX_DEBUG_CONFIG, 0);
-#endif
-
// Set TMDS_CTL0 to 1. This is a legacy setting.
REG_UPDATE(TMDS_CTL_BITS, TMDS_CTL0, 1);
- /*HW default is 5*/
- REG_UPDATE(RDPCSTX_CNTL,
- RDPCS_TX_FIFO_RD_START_DELAY, 4);
-
dcn10_aux_initialize(enc10);
}
--
2.38.1