From acaeb8c62fd1b2b57be1523b8d5b1d64a1a9dc38 Mon Sep 17 00:00:00 2001
From: Tinghan Shen <tinghan.shen@mediatek.com>
Date: Wed, 22 Jun 2022 14:22:45 +0800
Subject: [PATCH] ASoC: SOF: mediatek: Align mt8186 clock names with dt-bindings
Git-commit: acaeb8c62fd1b2b57be1523b8d5b1d64a1a9dc38
Patch-mainline: v6.0-rc1
References: jsc#PED-850
Align clock names in mt8186 dsp driver with dt-bindings.
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
Link: https://lore.kernel.org/r/20220622062245.21021-5-tinghan.shen@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Acked-by: Takashi Iwai <tiwai@suse.de>
---
sound/soc/sof/mediatek/mt8186/mt8186-clk.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/sound/soc/sof/mediatek/mt8186/mt8186-clk.c b/sound/soc/sof/mediatek/mt8186/mt8186-clk.c
index 22220fd50b62..2df3b7ae1c6f 100644
--- a/sound/soc/sof/mediatek/mt8186/mt8186-clk.c
+++ b/sound/soc/sof/mediatek/mt8186/mt8186-clk.c
@@ -18,8 +18,8 @@
#include "mt8186-clk.h"
static const char *adsp_clks[ADSP_CLK_MAX] = {
- [CLK_TOP_AUDIODSP] = "audiodsp_sel",
- [CLK_TOP_ADSP_BUS] = "adsp_bus_sel",
+ [CLK_TOP_AUDIODSP] = "audiodsp",
+ [CLK_TOP_ADSP_BUS] = "adsp_bus",
};
int mt8186_adsp_init_clock(struct snd_sof_dev *sdev)
--
2.35.3