From: Thierry Reding <treding@nvidia.com>
Date: Thu, 12 Aug 2021 16:17:12 +0200
Subject: arm64: tegra: Add missing interconnects property for USB on Tegra186
Git-commit: d6ff10e072e1150a9a135e355b1f85479609bab2
Patch-mainline: v5.15-rc1
References: jsc#SLE-20498
The device tree node for the XUDC (USB device mode controller) is
missing the interconnects property that describes the path to memory for
the controller. Add the property so that the things like the DMA mask
can be set by the operating system.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
---
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index 5ac842455569..e94f8add1a40 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -903,6 +903,9 @@ usb@3550000 {
<&bpmp TEGRA186_CLK_XUSB_CORE_SS>,
<&bpmp TEGRA186_CLK_XUSB_FS>;
clock-names = "dev", "ss", "ss_src", "fs_src";
+ interconnects = <&mc TEGRA186_MEMORY_CLIENT_XUSB_DEVR &emc>,
+ <&mc TEGRA186_MEMORY_CLIENT_XUSB_DEVW &emc>;
+ interconnect-names = "dma-mem", "write";
iommus = <&smmu TEGRA186_SID_XUSB_DEV>;
power-domains = <&bpmp TEGRA186_POWER_DOMAIN_XUSBB>,
<&bpmp TEGRA186_POWER_DOMAIN_XUSBA>;
--
2.31.1