From 1606e81543f80fc3b1912957cf6d8fa62e40b8e5 Mon Sep 17 00:00:00 2001
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Date: Thu, 17 Jun 2021 16:54:32 +0100
Subject: [PATCH] clk: renesas: rzg2l: Fix off-by-one check in rzg2l_cpg_clk_src_twocell_get()
Git-commit: 1606e81543f80fc3b1912957cf6d8fa62e40b8e5
Patch-mainline: v5.15-rc1
References: git-fixes stable-5.14.6
Fix clock index out of range check for module clocks in
rzg2l_cpg_clk_src_twocell_get().
Fixes: ef3c613ccd68 ("clk: renesas: Add CPG core wrapper for RZ/G2L SoC")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20210617155432.18827-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Takashi Iwai <tiwai@suse.de>
---
drivers/clk/renesas/renesas-rzg2l-cpg.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/renesas/renesas-rzg2l-cpg.c b/drivers/clk/renesas/renesas-rzg2l-cpg.c
index 34e90ee46290..9addc9dae31a 100644
--- a/drivers/clk/renesas/renesas-rzg2l-cpg.c
+++ b/drivers/clk/renesas/renesas-rzg2l-cpg.c
@@ -222,7 +222,7 @@ static struct clk
case CPG_MOD:
type = "module";
- if (clkidx > priv->num_mod_clks) {
+ if (clkidx >= priv->num_mod_clks) {
dev_err(dev, "Invalid %s clock index %u\n", type,
clkidx);
return ERR_PTR(-EINVAL);
--
2.26.2