From 45d1f841d5a4afb415415f9f87c9d4ce15e19f42 Mon Sep 17 00:00:00 2001
From: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Date: Wed, 30 Mar 2022 19:55:14 +0900
Subject: [PATCH] dt-bindings: phy: uniphier-usb3hs: Fix incorrect clock-names and reset-names
Git-commit: 45d1f841d5a4afb415415f9f87c9d4ce15e19f42
Patch-mainline: v5.19-rc1
References: git-fixes
There is no clock-names and reset-names for Pro5 SoC, that should have two
properties, "gio" and "link" like usb3-ssphy.
And according to the existing PXs2 devicetree, the clock-names for PXs2 SoC
should have "link" and "phy", and minItems of clocks should be 2.
Fixes: 134ab2845acb ("dt-bindings: phy: Convert UniPhier USB3-PHY conroller to json-schema")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/1648637715-19262-5-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Acked-by: Takashi Iwai <tiwai@suse.de>
---
.../phy/socionext,uniphier-usb3hs-phy.yaml | 16 +++++++++++-----
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml
index 33946efcac5e..1bbd164f2527 100644
--- a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml
@@ -31,12 +31,14 @@ properties:
const: 0
clocks:
- minItems: 1
+ minItems: 2
maxItems: 3
clock-names:
oneOf:
- - const: link # for PXs2
+ - items: # for Pro5
+ - const: gio
+ - const: link
- items: # for PXs3 with phy-ext
- const: link
- const: phy
@@ -49,9 +51,13 @@ properties:
maxItems: 2
reset-names:
- items:
- - const: link
- - const: phy
+ oneOf:
+ - items: # for Pro5
+ - const: gio
+ - const: link
+ - items: # for others
+ - const: link
+ - const: phy
vbus-supply:
description: A phandle to the regulator for USB VBUS
--
2.35.3