From: Martin Schwidefsky <schwidefsky@de.ibm.com>
Subject: s390/spinlock: add gmb memory barrier
Patch-mainline: Not yet, under development
References: LTC#164304, bsc#1084911
Add gmb memory barrier
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Acked-by: Petr Tesarik <ptesarik@suse.com>
---
arch/s390/include/asm/barrier.h | 10 ++++++++++
arch/s390/kernel/alternative.c | 7 +++++++
2 files changed, 17 insertions(+)
--- a/arch/s390/include/asm/barrier.h
+++ b/arch/s390/include/asm/barrier.h
@@ -7,6 +7,8 @@
#ifndef __ASM_BARRIER_H
#define __ASM_BARRIER_H
+#include <asm/alternative.h>
+
/*
* Force strict CPU ordering.
* And yes, this is required on UP too when we're talking
@@ -22,6 +24,14 @@
#define mb() do { asm volatile(__ASM_BARRIER : : : "memory"); } while (0)
+static inline void gmb(void)
+{
+ asm volatile(
+ ALTERNATIVE("", ".long 0xb2e8f000", 81)
+ : : : "memory");
+}
+#define gmb gmb
+
#define rmb() barrier()
#define wmb() barrier()
#define dma_rmb() mb()
--- a/arch/s390/kernel/alternative.c
+++ b/arch/s390/kernel/alternative.c
@@ -15,6 +15,13 @@ static int __init disable_alternative_in
early_param("noaltinstr", disable_alternative_instructions);
+static int __init nogmb_setup_early(char *str)
+{
+ __clear_facility(81, S390_lowcore.alt_stfle_fac_list);
+ return 0;
+}
+early_param("nogmb", nogmb_setup_early);
+
struct brcl_insn {
u16 opc;
s32 disp;