From: Mark Bloch <mbloch@nvidia.com>
Date: Tue, 1 Mar 2022 17:24:40 +0000
Subject: net/mlx5: Lag, support single FDB only on 2 ports
Patch-mainline: v5.19-rc1
Git-commit: e2c45931ff124381e6389c5e226a9527ff8c9969
References: jsc#PED-1549

E-Switch currently doesn't support more than 2 E-Switch managers
being aggregated under a single hardware lag. Have specific checks
to disallow creating lag when the code doesn't support it.

Signed-off-by: Mark Bloch <mbloch@nvidia.com>
Reviewed-by: Maor Gottlieb <maorg@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Acked-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
---
 drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c |    4 ++++
 1 file changed, 4 insertions(+)

--- a/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c
@@ -458,6 +458,7 @@ static int mlx5_deactivate_lag(struct ml
 	return 0;
 }
 
+#define MLX5_LAG_OFFLOADS_SUPPORTED_PORTS 2
 static bool mlx5_lag_check_prereq(struct mlx5_lag *ldev)
 {
 #ifdef CONFIG_MLX5_ESWITCH
@@ -470,6 +471,9 @@ static bool mlx5_lag_check_prereq(struct
 #ifdef CONFIG_MLX5_ESWITCH
 	mode = mlx5_eswitch_mode(ldev->pf[MLX5_LAG_P1].dev);
 
+	if (mode == MLX5_ESWITCH_OFFLOADS && ldev->ports != MLX5_LAG_OFFLOADS_SUPPORTED_PORTS)
+		return false;
+
 	return (mode == MLX5_ESWITCH_NONE || mode == MLX5_ESWITCH_OFFLOADS) &&
 		(mlx5_eswitch_mode(ldev->pf[MLX5_LAG_P1].dev) ==
 		 mlx5_eswitch_mode(ldev->pf[MLX5_LAG_P2].dev));