From: Dave Airlie <airlied@redhat.com>
Date: Fri, 29 Sep 2017 17:13:29 +1000
Subject: amdgpu/dc: set some of the link dp code to static.
Git-commit: 04e212926f0d1213bc1ff1f8ab4050878699977d
Patch-mainline: v4.15-rc1
References: FATE#326289 FATE#326079 FATE#326049 FATE#322398 FATE#326166
These aren't currently used outside this file.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Petr Tesarik <ptesarik@suse.com>
---
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 18 +++++++++++++-----
drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h | 8 --------
2 files changed, 13 insertions(+), 13 deletions(-)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -32,6 +32,14 @@ enum {
LINK_TRAINING_MAX_CR_RETRY = 100
};
+static bool decide_fallback_link_setting(
+ struct dc_link_settings initial_link_settings,
+ struct dc_link_settings *current_link_setting,
+ enum link_training_result training_result);
+static struct dc_link_settings get_common_supported_link_settings (
+ struct dc_link_settings link_setting_a,
+ struct dc_link_settings link_setting_b);
+
static void wait_for_training_aux_rd_interval(
struct dc_link *link,
uint32_t default_wait_in_micro_secs)
@@ -1150,7 +1158,7 @@ bool dp_hbr_verify_link_cap(
return success;
}
-struct dc_link_settings get_common_supported_link_settings (
+static struct dc_link_settings get_common_supported_link_settings (
struct dc_link_settings link_setting_a,
struct dc_link_settings link_setting_b)
{
@@ -1215,7 +1223,7 @@ enum dc_lane_count reduce_lane_count(enu
}
}
-enum dc_link_rate reduce_link_rate(enum dc_link_rate link_rate)
+static enum dc_link_rate reduce_link_rate(enum dc_link_rate link_rate)
{
switch (link_rate) {
case LINK_RATE_HIGH3:
@@ -1231,7 +1239,7 @@ enum dc_link_rate reduce_link_rate(enum
}
}
-enum dc_lane_count increase_lane_count(enum dc_lane_count lane_count)
+static enum dc_lane_count increase_lane_count(enum dc_lane_count lane_count)
{
switch (lane_count) {
case LANE_COUNT_ONE:
@@ -1243,7 +1251,7 @@ enum dc_lane_count increase_lane_count(e
}
}
-enum dc_link_rate increase_link_rate(enum dc_link_rate link_rate)
+static enum dc_link_rate increase_link_rate(enum dc_link_rate link_rate)
{
switch (link_rate) {
case LINK_RATE_LOW:
@@ -1265,7 +1273,7 @@ enum dc_link_rate increase_link_rate(enu
* false - has reached minimum setting
* and no further fallback could be done
*/
-bool decide_fallback_link_setting(
+static bool decide_fallback_link_setting(
struct dc_link_settings initial_link_settings,
struct dc_link_settings *current_link_setting,
enum link_training_result training_result)
--- a/drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h
@@ -37,14 +37,6 @@ bool dp_hbr_verify_link_cap(
struct dc_link *link,
struct dc_link_settings *known_limit_link_setting);
-bool decide_fallback_link_setting(struct dc_link_settings link_setting_init,
- struct dc_link_settings *link_setting_current,
- enum link_training_result training_result);
-
-struct dc_link_settings get_common_supported_link_settings (
- struct dc_link_settings link_setting_a,
- struct dc_link_settings link_setting_b);
-
bool dp_validate_mode_timing(
struct dc_link *link,
const struct dc_crtc_timing *timing);