From a5d5ea95614206f41687d4580e7ab68958d91093 Mon Sep 17 00:00:00 2001
From: Jayachandran C <jnair@caviumnetworks.com>
Date: Fri, 16 Jun 2017 13:22:50 +0000
Subject: [PATCH] ahci: thunderx2: stop engine fix update
Patch-mainline: Never, Early silicon errata
References: bsc#1045590
The stop engine errata fix currently checks only for the CN99XX Ax MIDR, so
the changes are applied even to external SATA controllers connected to the
CN99XX board.
Fix the errata check to include PCI ID so that the fix is applied only
to the onboard SATA.
Signed-off-by: Jayachandran C <jnair@caviumnetworks.com>
Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@suse.com>
---
drivers/ata/libahci.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/ata/libahci.c b/drivers/ata/libahci.c
index fe4aa8b87504..2d052078f7b7 100644
--- a/drivers/ata/libahci.c
+++ b/drivers/ata/libahci.c
@@ -666,7 +666,10 @@ int ahci_stop_engine(struct ata_port *ap)
#ifdef CONFIG_ARM64
/* Rev Ax of Cavium CN99XX needs a hack for port stop */
- if (MIDR_IS_CPU_MODEL_RANGE(read_cpuid_id(),
+ if (dev_is_pci(ap->host->dev) &&
+ to_pci_dev(ap->host->dev)->vendor == 0x14e4 &&
+ to_pci_dev(ap->host->dev)->device == 0x9027 &&
+ MIDR_IS_CPU_MODEL_RANGE(read_cpuid_id(),
MIDR_CPU_MODEL(ARM_CPU_IMP_BRCM, BRCM_CPU_PART_VULCAN),
MIDR_CPU_VAR_REV(0, 0),
MIDR_CPU_VAR_REV(0, MIDR_REVISION_MASK))) {
--
2.11.0