From ad93730e19e3b3b17fcf4d074446a8c1f2b534aa Mon Sep 17 00:00:00 2001
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Date: Tue, 29 Jan 2019 08:09:00 +0000
Subject: [PATCH 06/26] PCI: mobiveil: correct PCI base address in MEM/IO
outbound windows
Patch-mainline: Submitted, https://patchwork.kernel.org/cover/10785657/
References: fate#326572
It should get PCI base address from the DT node property 'ranges'
to setup MEM/IO outbound windows instead of always zero.
Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge
IP driver")
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@suse.com>
---
drivers/pci/host/pcie-mobiveil.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/host/pcie-mobiveil.c b/drivers/pci/host/pcie-mobiveil.c
index 02292b0a04a3..5c0ca63ba9cf 100644
--- a/drivers/pci/host/pcie-mobiveil.c
+++ b/drivers/pci/host/pcie-mobiveil.c
@@ -637,8 +637,9 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie)
/* configure outbound translation window */
program_ob_windows(pcie, pcie->ob_wins_configured,
- win->res->start, 0, type,
- resource_size(win->res));
+ win->res->start,
+ win->res->start - win->offset,
+ type, resource_size(win->res));
}
/* setup MSI hardware registers */
--
2.11.0